PROGRAM

2025 ACM/IEEE System Level Interconnect Pathfinding Workshop

Technical Program

27th ACM/IEEE International Workshop on System-Level Interconnect Pathfinding (SLIP 2025)

27th ACM/IEEE International Workshop on
System-Level Interconnect Pathfinding (SLIP 2025)

Program Schedule
08:30–08:35

Welcome

Dirk Stroobandt — Ghent University, Belgium
08:35–09:25

AI-guided detailed routing

Evageline Young — Chinese Univ of Hong Kong, China
09:30–10:00

BREAK

10:00–10:40

3D integration technology addressing memory and power walls

Geert Van der Plas — imec, Belgium
10:40–11:30

Interconnect-aware SRAM design in advanced nodes

Mehdi B. Tahoori — Karlsruhe Institute of Technology, Germany
11:30–13:00

LUNCH

13:00–13:40

Datacenter GPU infrastructure scaling with emerging interconnects

Aakash Patel — imec, Belgium
13:40–14:30

The impact of high-level synthesis on interconnect complexity

Kate Thurner — Univ of Toronto, Canada
14:30–15:00

BREAK

15:00–15:40

Advanced Standard Cell Design Balancing FEOL and BEOL Resource Usage

Taewhan Kim — Seoul National University, South Korea
15:40–16:10

Interconnect-aware netlist generation: Trading compactness for routability

Xiaoke Wang — Ghent University, Belgium
16:10–16:15

Closing remarks

Dirk Stroobandt — Ghent University, Belgium